1. Field of the Invention
The present invention relates to a voltage-controlled oscillator and, more particularly, to a voltage-controlled oscillator that is used as a voltage-controlled temperature-compensated crystal oscillator.
2. Description of the Related Art
In recent years, with rapid development of mobile communication devices, such as mobile phones, the mobile communication devices are required to have a temperature compensation function, to be miniaturized, and to use a higher frequency. Similarly to the mobile communication devices, a crystal oscillator, which has been used in the mobile communication devices as a standard of a communication frequency, is also required to have a temperature compensation function, to be miniaturized, and to use a higher frequency.
A temperature-compensated crystal oscillator has a temperature compensation function and is designed to reduce a variation of frequency due to temperature variation, and is widely used as a reference frequency source of a mobile phone or the like. A voltage-controlled oscillator is designed to control a frequency by controlling a terminal voltage of a variable capacitor, which is a load capacitor in an oscillating loop and changes a capacitance value by a voltage, to change the load capacitor. There is a temperature-compensated crystal oscillator that is designed to cancel temperature characteristic of a crystal vibrator (piezoelectric vibrator) by controlling the terminal voltage of the variable capacitor in the voltage-controlled oscillator.
Recently, the temperature-compensated crystal oscillator has been designed to have lower phase noise, to shorten driving time, to have higher temperature compensation, and to be miniaturized. A crystal vibrator should necessarily be miniaturized to make a smaller crystal oscillator. However, in case the crystal vibrator becomes small, a change rate of frequency corresponding to a change in a variable capacitor is generally likely to reduce.
Thus, it is necessary to increase the amount of change of variable capacitor, which is used as a load capacitor, with respect to a control voltage. For example, as described in JP-A-2003-318417 and JP-A-11-220329, it is possible to increase a change of capacitance value with respect to a change of a control voltage by using a static capacitance generated between a gate terminal and a source-drain terminal of a MOS transistor, in which the source terminal and the drain terminal are shorted to each other, thereby improving sensitivity of a change in frequency of a crystal oscillator (see FIG. 18). For example, FIG. 16 shows a voltage-controlled oscillator that includes an amplifier having a feedback resistor 1 and an inverter 2, a piezoelectric vibrator 3, and first and second MOS transistors 4 and 5 which serve as variable capacitors and are connected to both terminals of the piezoelectric vibrator 3. In the variable capacitors, source and drain terminals of each of the first and second MOS transistors 4 and 5 are shorted to each other, and the static capacitance generated between the source-drain terminal and the gate terminal of each of the first and second MOS transistors 4 and 5 is controlled by a voltage source 45 that is connected to the gate terminal.
The voltage-controlled oscillator controls a frequency by directly connecting a static capacitance, which is a variable capacitor, generated between a source-drain terminal and a gate terminal of a MOS transistor to a crystal vibrator (piezoelectric vibrator) and an amplifier of an oscillation circuit and by controlling a gate voltage of the MOS transistor so as to change the static capacitance generated between the source-drain terminal and the gate terminal. In this case, when the gate voltage of the MOS transistor is equal to a sum of source-drain terminal voltage and threshold voltage, a channel is formed below a gate oxide film, thereby increasing a static capacitance between the gate terminal and the channel, that is, a static capacitance between the source-drain terminals (at this time, the voltage is referred to as a capacitance switching voltage).
As a first problem of the above-mentioned voltage-controlled oscillator according to the related art, since DC bias of a drain terminal is determined on an amplifier side of an oscillation circuit, it is not possible to set a capacitance switching voltage to a predetermined value and it is thus not possible to control a frequency based on a predetermined gate voltage.
As a second problem that in a typical CMOS process, the capacitance switching voltage is changed depending on a deviation in threshold voltage or the temperature characteristic of a MOS transistor. However, in an example according to the related art, a temperature characteristic compensation signal and an external voltage frequency control signal need to have a characteristic for canceling the deviation in threshold voltage or temperature characteristic of the MOS transistor in order to compensate for the changed capacitance switching voltage. Particularly, when the threshold voltage of the MOS transistor is deviated, the capacitance switching voltage is changed as shown in FIG. 19A. Thus, there is another problem in that a deviation of the oscillation frequency characteristic of the voltage-controlled oscillator in the example according to the related art with respect to a voltage between the gate terminal and the source-drain terminal is large as shown in FIG. 19B, such that the characteristic of the control voltage becomes complicated.
As a third problem, there is another problem in that since the capacitance value is large when the gate voltage is less than the capacitance switching voltage, a variable range of a frequency is small. Since the frequency-capacitor characteristic of the piezoelectric vibrator shows an exponential curve, the variable range of a frequency with respect to a change of capacitor is reduced if the capacitance value is large when the gate voltage is less than the capacitance switching voltage.
As a fourth problem, due to a deviation between an impurity concentration of a channel of a MOS transistor and a concentration of an N-type semiconductor area, a parasitic capacitance between the source-drain terminal and the ground terminal of a MOS variable capacitor is dispersed and a load capacitor of an oscillator is dispersed, thereby increasing a deviation of oscillation frequency. This problem will be described in a variable characteristic of capacitor viewed from each terminal of the MOS variable capacitor in the voltage-controlled oscillator according to the related art.
FIG. 17(a) is a structure of a MOS variable capacitor in a typical CMOS process used in an example according to the related art, which is a three-terminal type variable element including: an N-type epitaxial layer 41 formed in a P-type semiconductor substrate 36, a P-type well layer of backgate 33 formed in the N-type epitaxial layer 41, a thin silicon oxide film 34 and a P-type polysilicon gate electrode 35 formed on the backgate 33, an N-type well layer of source electrode 38 and a drain electrode 39 formed in the backgate 33, and a P-type layer of backgate electrode 40 formed on the backgate 33 and having a higher concentration than the backgate 33, in which the P-type semiconductor substrate 36 and the backgate electrode 40 are grounded, and a control voltage is applied between a source-drain electrode 38 or 39, which is formed by commonly connecting the source electrode 38 and the drain electrode 39 to each other, and the gate electrode 35 to change a capacitance between the source-drain electrode 38 or 39 and the gate electrode 35. Next, a process of changing the capacitance between the source-drain electrode 38 or 39 and the gate electrode 35 by a voltage between the source-drain electrode 38 or 39 and the gate electrode 35 will be described.
In case the MOS variable capacitor of FIG. 17 is used in the voltage-controlled oscillator according to the related art shown in FIG. 16, when the voltage Vg-ds between the gate electrode 35 and the source-drain electrode 38 or 39 is lower than a threshold voltage VTH of the MOS transistor, a depletion layer 37 is generated in the vicinity of a semiconductor surface of a boundary between the backgate 33 and the silicon oxide film 34, thereby generating a depletion layer capacitance Cd. As shown in an equivalent circuit of FIG. 17(b), a capacitance between the source-drain electrode 38 or 39 and the backgate electrode 40 is equal to a parallel capacitor Cdjs+Cdjd of a source-backgate junction capacitance and a drain-backgate junction capacitance, and a capacitance between the gate electrode 35 and the backgate electrode 40 is equal to a serial capacitance of a gate oxide film capacitor Cox and a depletion layer capacitance Cd. As shown in FIG. 16, the gate electrode 35 is biased with a direct current (DC) signal by the voltage source 45 and has the same potential as that of the backgate electrode 40 in an alternating current (AC) signal. Since the source-drain electrode 38 or 39 is biased with an AC signal from the piezoelectric vibrator 3 and the inverter 2, an AC capacitance between the source-drain electrode 38 or 39 and the gate electrode 35 approximates to the parallel capacitor Cdjs+Cdjd of the source-backgate junction capacitance and the drain-backgate junction capacitance.
Next, as shown in FIG. 17(c), when the voltage Vg-ds between the gate electrode 35 and the source-drain electrode 38 or 39 is greater than the threshold voltage VTH, minority carrier electrons are induced to form a reverse layer (channel) on a semiconductor surface of a boundary between the backgate 33 and the silicon oxide film 34, and the depletion layer 37 is not widen, resulting in a constant depletion layer capacitance Cd. In this case, a semiconductor surface of a boundary of the source-drain electrode 38 or 39 and the backgate 33 and the silicon oxide film 34 are in the same potential by the channel formed below the gate oxide film. Thus, as shown in FIG. 16, the gate electrode 35 has a direct current (DC) signal biased by the voltage source 45 and has the same potential as that of the backgate electrode 40 in an alternating current (AC) signal. Since an AC signal from the piezoelectric vibrator 3 and the inverter 2 is biased in the source-drain electrode 38 or 39, as shown in FIG. 17(d), an alternative capacitance between the source-drain electrode 38 or 39 and the gate electrode 35 approximates to a parallel capacitance Cox+Cd+Cdjs+Cdjd of a capacitance of the gate oxide film, a capacitance of the depletion layer, a capacitance of the source-backgate junction, and a capacitance of the drain-backgate junction, thereby obtaining a maximum capacitance (referred to as capacitance switching voltage).
In this case, due to a deviation between an impurity concentration of a channel of the MOS transistor and a concentration of the N-type semiconductor area, the source-backgate junction capacitance Cdjs, the drain-backgate junction capacitance Cdjd, and the depletion layer capacitance Cd (particularly, the depletion layer capacitance Cd) are dispersed. Accordingly, as shown in FIG. 18, when the voltage Vg-ds between the gate electrode 35 and the source-drain electrode 38 or 39 is lower than the capacitance switching voltage, the capacitance between the source-drain electrode 38 or 39 and the gate electrode 35 is dispersed by a deviation between the source-backgate junction capacitance Cdjs and the drain-backgate junction capacitance Cdjd, and a maximum value f0max of oscillation frequency of the voltage-controlled oscillator according to the related art shown in FIG. 16 is dispersed by the capacitance deviation. Similarly, as shown in FIG. 18, when the voltage Vg-ds between the gate electrode 35 and the source-drain electrode 38 or 39 is higher than the capacitance switching voltage, the capacitance between the source-drain electrode 38 or 39 and the gate electrode 35 is dispersed by a deviation between the source-backgate junction capacitance Cdjs, the drain-backgate junction capacitance Cdjd, and the depletion layer capacitance Cd, and a minimum value f0min of oscillation frequency of the voltage-controlled oscillator according to the related art shown in FIG. 16 is dispersed by the capacitance deviation.
Accordingly, in order to facilitate designing a crystal oscillator using the static capacitance generated between the source-drain terminal and the gate terminal, there is a problem in that the static capacitance generated between terminals of the MOS transistor is required to be enlarged or the static capacitance is required to be enlarged through the use of an array structure, the threshold voltage control signal of the MOS transistor needs to be controlled independently of the temperature characteristic compensation signal and the external voltage frequency control signal, and the deviation of static capacitance generated between the source-drain terminal and the gate terminal needs to be reduced.